Altium

Design Rule Verification Report

Date: 6/10/2020
Time: 3:35:56 PM
Elapsed Time: 00:00:01
Filename: C:\Users\Public\Documents\Altium\AD18\Projects\POX_V1.2\POX_V1.2.PcbDoc
Warnings: 0
Rule Violations: 13

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=6mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=6mil) (Max=15mil) (Preferred=8mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Hole Size Constraint (Min=1mil) (Max=100mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=6mil) (Disabled)(All),(All) 0
Silk To Solder Mask (Clearance=4mil) (IsPad),(All) 13
Silk to Silk (Clearance=10mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 13

Silk To Solder Mask (Clearance=4mil) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-1(944.174mil,454.056mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-10(944.174mil,702.086mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-11(944.174mil,729.646mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-12(944.174mil,757.204mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-13(944.174mil,784.764mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-2(944.174mil,481.614mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-3(944.174mil,509.174mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-4(944.174mil,536.732mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-5(944.174mil,564.292mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-6(944.174mil,591.85mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-7(944.174mil,619.41mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-8(944.174mil,646.968mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 4mil) Between Pad U2-9(944.174mil,674.528mil) on Top Layer And Track (977.638mil,375.314mil)(977.638mil,863.504mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Back to top